The AED-102 daughterboard is designed to facilitate construction of prototypes or quickly make small production runs for low speed multiple channel sampling applications with Texas Instruments Digital Signal Processors. It fits the expansion slot of Texas Instruments Digital Signal Processing Evaluation Modules (EVM) and DSP Starter Kits (DSK) for TMS320C6xxx and C5xxx DSPs made by Texas Instruments, DNA Enterprises, Inc., and Blue Wave Systems. This expansion slot has both an expansion memory interface and an expansion peripheral interface which allows the daughterboard full access to all of the DSP's resources.
The obvious application of the AED-102 is in process control and measurement. The inputs can be sampled up to 66 KS/s. However, as there are three A/D converters which must cover as many as 22 input signals the average sampling rates are lower when more than three channels are used. The D/A converters support eight outputs of up to 1.25 MS/s with a programmable settling time is 3 or 9 usec.
The advantage of this daughterboard over boards that contain only the A/D and D/A converters is that it provides for both analog signal conditioning circuits and for digital preprocessing before the sampled data is placed in the DSP memory. This allows prototypes with the complete front end design which is often essential to successful development in high speed applications of the DSP. The inputs to the A/D converters and the outputs of the D/A converters lead directly to a breadboard area on which conditioning circuits can be constructed. The A/D and D/A converters have their serial digital interface connected directly to a Xilinx FPGA which provides a flexible digital interface to the DSP.
The strategic location of the FPGA between the DSP and the converters allows it to perform many useful functions. It allows blocking and FIFO buffering of signals before they are placed in the DSP memory. This can optimize the use of DSP memory and memory bus bandwidth which is often a limiting factor in DSP applications. The FPGA can provide an input decimation filter which limits the bandwidth with sharp digital filter edges and reduces the number of samples allowing the application to work with higher initial sample rates than the DSP can handle. The FPGA can construct high speed output samples for the D/A converters based on DSP inputs or the signal coming from the A/D converters. The FPGA also connects to the external digital I/O connector and to the clock/control lines of the converters. This allows synchronization of the converters with both external signals and with DSP signals.
The breadboard area consists of 7 sq. in. of 50 mil pitch surface mount or DIP component area. This allows a wide variety of components to be wired into signal conditioning circuits. The breadboard area is served by separate + and - regulated power supplies for sensitive analog components. Two connectors, a 40 pin for digital signals and a 50 pin for analog signals, are adjacent to the breadboard at the edge of the daughterboard where 25 mil ribbon connectors are easily plugged in.
SIGNALWARE provides technical support for all aspects of the use of the AED-102 including signal conditioning circuit design, FPGA configuration programming, and DSP software programming. SIGNALWARE can provide a turnkey solution to prototyping a DSP application. Signal conditioning circuits can be mounted and wired on the board at the time of manufacture at less cost than having a technician or engineer wire them on the board afterward. SIGNALWARE also provides a 90 day limited warranty against workmanship and component defects.