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TMS320C5x/C6x EVALUATION MODULE

Analog Expansion Daughterboard

AED-21x (10-bit, 30 MS/s)

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AED-21x 10-bit Flexible Analog Expansion Daughterboard

DATA SHEET

The SIGNALWARE AED-21x 10-bit Analog Expansion Daughterboards for the Texas Instruments TMS320C6x/5x Evaluation Module or DSP Starter Kit provide a flexible 30 million sample per second data acquisition, signal processor or signal generator capability attached to a variety of DSPs. The daughterboard has up to three channels that may be either A/D or D/A converters. The analog channels interface to the DSP through an FPGA which provides user programmable logic to implement a wide variety of applications. In addition to the analog channels, three groups of 8 buffered digital signals can be switched to either input or output. Breadboard space is provided for constructing signal conditioning and analog interface circuits. This daughter board has applications in software radio designs, telecommunications services, image sensor processing, and other signal processing functions.

Intro 2x Block Diagram

Standard configurations are available for 1, 2 and 3 converters total in all combinations of A/D and D/A converters. The configuration table below shows the part numbers and base prices available as standard configurations. Standard options for all configurations are also shown. Custom versions are also available; see AED-200 for pricing.

The AED-21x is ideally suited to prototyping hybrid (digital and analog) circuits that interface to a DSP. A wide variety of TI DSP devices can be evaluated or demonstrated by combining TI prototyping products with these daughterboards. Also, the AED-21x may be used to construct inexpensive personal computer based or stand-alone systems where the number of systems does not justify a custom designed printed circuit board.

Programmable DSP I/F Adds Performance

Preprocessing of the A/D samples and control of the converters with the Field Programmable Gate Array (FPGA) significantly reduces the load on the DSP making more computation possible with a single DSP. A Xilinx SPARTANTM XL FPGA is standard, and larger FPGAs are available as options. The FPGA column in the configuration table specifies the FPGA used for each part number. Serial flash memory (optional), socketed PROM or the JTAG port can provide FPGA configuration.

The FPGA configuration and sample DSP program supplied demonstrate the operation of the daughterboard at sample rates available from the EVM or DSK clock frequencies. The table below shows the frequencies available based on EVM or DSK clocks. Some additional clock frequencies can be generated by the Virtex XCVxxx FPGA option using its DLL and the board clocks. All other frequencies within the operating limits shown in the configuration table are available with an optional external oscillator and an optional Virtex XCVxxx FPGA in order to accommodate the asychronous operation.

EVM or DSK Model External Clock AED-211 AED-212 AED-213 thru AED-215 AED-216 thru AED-219
6201 EVM 66.5 MHz 16.625 MHz 11.083 MHz 8.3125 MHz
6201 EVM 80 MHz 20 MHz 13.333 MHz 10.00 MHz
6701 EVM 50 MHz 25 MHz 12.5 MHz 8.333 MHz
6701 EVM 66.5 MHz 16.625 MHz 11.083 MHz 8.3125 MHz
6x11 DSK* 100 MHz 25 MHz 12.5 MHz 10.00 MHz

* Additional frequencies are available by changing numbers on the 6x11 cards.

AED-217 block diagram, below, is an example of one board configuration in the AED-21x series:

AED-217 Block Diagram

Surface Mount Breadboard Adds Flexibility

To make the analog interface to the board convenient and flexible, almost 7 sq. in. of breadboard space is provided. The analog interface to the converters always needs to be tailored to the application. No approach is more flexible than a breadboard area specifically designed for surface mount and through-hole analog ICs. The AED-200 breadboard accommodates wide and narrow SOICs (50 mil pitch) as well as 0.3 and 0.6 DIPs (100 mil pitch). By keeping the signal conditioning circuits on the board with the converters, noise, errors, and cost are reduced. Regulated +/- DC analog power buses supply the breadboard area.

Flash Memory Adds Stand-alone Capability

The AED-200 may have optional flash memory for C6x program and data storage on main boards without flash memory. Lack of boot up memory is often the critical factor in using the EVM boards in stand-alone mode. Either a 512 Kbyte or 1 Mbyte option is available.

AED-21x Specifications

Analog to Digital Conversion:

1-3 TI THS1030 10-bit Converters (DW package)

Digital to Analog Conversion:

1-3 TI THS5651A 10-bit Converters (DW package)

1-3 TI THS4001 Output Buffer Amplifiers (D package)

Voltage Reference

4.096 volt 1%, 2.048 volt 1%, and 1.024 volt 1%

Digital Interface to DSP

Digital I/O and External Synchronization:

24 - Buffered TTL Input/Outputs up to 100 MHz - Switchable to input or output in groups of 8.

Debugging Interfaces:

Operating Temperature Range: 0 to 40 degree C

Power: +5, +3.3, +/-12 VDC

Size: 191 mm L x 86.2 mm W x 13.8 mm D

Net Weight: 0.14 (0.31) kg (lb)


Ordering Information

AED-21x Analog Expansion Daughterboard's base prices are shown below:

Part

No.

A/Ds D/As Max Sample

Rate

FPGA
AED211 1 0 30 Msps* XCS20
AED212 0 1 30 Msps* XCS20
AED213 2 0 15 Msps XCS20
AED214 1 1 15 Msps XCS40
AED215 0 2 15 Msps XCS20
AED216 3 0 10 Msps XCS20
AED217 2 1 10 Msps XCS40
AED218 1 2 10 Msps XCS40
AED219 0 3 10 Msps XCS20

* Analog performance may be limited to less than the full rated bandwidth by lead lengths in the mixed signal mounting area and by user input circuits.

Opt. 1a - 512 Kbyte Boot Flash Memory
Opt. 1b - 1.0 Mbyte Boot Flash Memory
Opt. 1c - Stacking Interface Connectors**
Opt. 1d - High Power 2.5V Supply**
Opt. 1o-xx.xxxx - External Oscillator
Opt. 2g-4/6 - XCV50-4/6* FPGA Substitution
Opt. 2a-4/6 - XCV100-4/6 FPGA Substitution
Opt. 2b-4/6 - XCV150-4/6 FPGA Substitution
Opt. 2c-4/6 - XCV200-4/6 FPGA Substitution
Opt. 2d-4/6 - XCV300-4/6 FPGA Substitution
Opt. 2e-4/6 - XCV400-4/6 FPGA Substitution
Opt. 2f-4/6 - XCV600-4/6 FPGA Substitution
Opt. 2h-4/6 - XCV800-4/6 FPGA Substitution
Opt. 2t - XCS30XL-4 FPGA Substitution (AED-211, 212, 213, 215, 216, 219 only)
Opt. 2u - XCS40XL-4 FPGA Substitution (AED-211, 212, 213, 215, 216, 219 only)
Opt. 3f - Custom Analog Filters
Opt. 4 - Custom FPGA Configuration

** Stacking Interface Connectors and High Power Supply options are mutually exclusive.  Stacking connectors are required when more than one board is used on a single DSK or EVM.  The High Power may be mounted on the outer most daughterboard, and it may supply FPGAs on more than one daughterboard.  High Power Supplies are recommended for all FPGA options XCV300-6 and above.

Pricing and Delivery:Please complete a Request of Quotation form. Your request will be processed for direct purchase from Signalware or forwarded to the appropriate distributor.

Terms and Conditions: Contact distributor except for direct purchase.


For information on other daughterboards, see our Summary of Signalware Daughterboards.

For information on DSP Development boards that use Signalware daughterboards, see our Summary of DSP Development Products.

For information on various combinations of TMS320C5x/C6x EVM and DSK products listed above with the Signalware daughterboards, see our Prototype Configuration Table.

See SIGNALWARE's Home Page or Customer Reply Form for further assistance.